1. Field of the Invention
The present invention relates to a device and a manufacturing method thereof. In particular, the present invention relates to a manufacturing method of a display device or a semiconductor device. Specifically, the present invention relates to a manufacturing method of a display device or a semiconductor device, in which a single-crystal semiconductor is fixed to an insulating substrate.
2. Description of the Related Art
In recent years, a technique for forming a thin film transistor (TFT) by using a semiconductor thin film (having a thickness of approximately several to several hundreds of nanometers) formed over a substrate having an insulating surface has attracted attention. Thin film transistors have been widely applied to electronic devices such as ICs and electro-optical devices and have been rapidly developed particularly as switching elements for image display devices.
In order to obtain high-definition image display, a highly accurate photolithography technique for arranging switching elements of an image display device with high area efficiency has been required. A large one-shot exposure apparatus, a stepper exposure apparatus, or the like is used in order to form switching elements over a large substrate with high accuracy.
Although a large one-shot exposure apparatus can expose a large area to light at a time, there is a problem in that variation in illuminance intensity or degree of parallelization is large. Therefore, a stepper exposure apparatus using an optical system is often used.
A region which is exposed to light at a time with a stepper exposure apparatus is limited. When light exposure is performed on an area which is larger than the region, light exposure is needed to be performed repeatedly with several shots.
In addition, instead of a silicon wafer which is manufactured by thinly slicing an ingot of a single-crystal semiconductor, a semiconductor substrate which is referred to as a silicon-on-insulator (an SOI substrate) in which a thin single-crystal semiconductor layer is provided over an insulating layer has been developed and has been spread as a substrate in manufacturing a microprocessor or the like. This is because an integrated circuit using an SOI substrate has attracted attention as a circuit which reduces parasitic capacitance between a drain of a transistor and the substrate, improves performance of a semiconductor integrated circuit, and reduces power consumption.
As a method for manufacturing an SOI substrate, a hydrogen ion implantation separation method is known (e.g., see Reference 1: U.S. Pat. No. 6,372,609). A hydrogen ion implantation separation method is a method in which hydrogen ions are implanted into a silicon wafer to form a microbubble layer at a predetermined depth from the surface of the silicon wafer and a thin silicon layer (an SOI layer) is bonded to another silicon wafer with the microbubble layer used as a cleavage plane. In addition to heat treatment for separating the SOI layer, it is necessary to remove an oxide film after the oxide film is formed over the SOI layer by heat treatment in an oxidizing atmosphere and then to perform heat treatment at 1000 to 1300° C. in a reducing atmosphere to increase bonding strength.
Meanwhile, a method for forming an SOI layer over an insulating substrate such as a glass substrate has been proposed. As an example of an SOI substrate where an SOI layer is formed over a glass substrate, a device where a thin single-crystal silicon layer is formed over a glass substrate having a coating film by using a hydrogen ion implantation separation method is known (see Reference 2: U.S. Pat. No. 7,119,365). Also in this case, hydrogen ions are implanted into a single-crystal silicon piece to form a microbubble layer at a predetermined depth from the surface of the single-crystal silicon piece, a glass substrate and the single-crystal silicon piece are attached to each other, and then a thin silicon layer (an SOI layer) is formed over the glass substrate by separating the single-crystal silicon piece with the microbubble layer used as a cleavage plane.